[PATCH v2 0/6] microblaze: Cleanup series

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[PATCH v2 0/6] microblaze: Cleanup series

Michal Simek-3
Hi,

I looked at microblaze configs and clean up some things. All changes were
done in connection to detect nor flash based on information taken from DT.

Thanks
Michal

Changes in v2:
- Rework the whole patch because SPL_NOR is enabled by default.

Michal Simek (6):
  microblaze: Clean config file from ifdef mess
  microblaze: Simplify cache handling
  microblaze: Get rid of xparameters.h
  microblaze: Remove CONFIG_SYS_FDT_SIZE
  microblaze: Unify of setting for SPL_NOR/XIP support
  microblaze: Detect NOR flash based on DT

 board/xilinx/microblaze-generic/xparameters.h | 18 ----
 configs/microblaze-generic_defconfig          |  2 +
 include/configs/microblaze-generic.h          | 87 ++-----------------
 scripts/config_whitelist.txt                  |  1 -
 4 files changed, 11 insertions(+), 97 deletions(-)
 delete mode 100644 board/xilinx/microblaze-generic/xparameters.h

--
2.29.2

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[PATCH v2 1/6] microblaze: Clean config file from ifdef mess

Michal Simek-3
A lot of configs has been moved to Kconfig and it ends up in ifdef mess
with no bodies. That's why remove all of them.

Signed-off-by: Michal Simek <[hidden email]>
---

(no changes since v1)

 include/configs/microblaze-generic.h | 24 ------------------------
 1 file changed, 24 deletions(-)

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 2b4124235082..d5b2bd856608 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -67,24 +67,6 @@
 # define CONFIG_SYS_MAX_FLASH_BANKS 1
 /* max number of sectors on one chip */
 # define CONFIG_SYS_MAX_FLASH_SECT 512
-/* hardware flash protection */
-/* use buffered writes (20x faster) */
-# ifdef RAMENV
-# else /* FLASH && !RAMENV */
-/* 128K(one sector) for env */
-# endif /* FLASH && !RAMBOOT */
-#else /* !FLASH */
-
-#ifdef SPIFLASH
-# ifdef RAMENV
-# else /* SPIFLASH && !RAMENV */
-/* 128K(two sectors) for env */
-/* Warning: adjust the offset in respect of other flash content and size */
-# endif /* SPIFLASH && !RAMBOOT */
-#else /* !SPIFLASH */
-
-/* ENV in RAM */
-#endif /* !SPIFLASH */
 #endif /* !FLASH */
 
 #define XILINX_USE_ICACHE 1
@@ -111,12 +93,6 @@
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-#if defined(CONFIG_MTD_PARTITIONS)
-/* MTD partitions */
-
-/* default mtd partition table */
-#endif
-
 /* size of console buffer */
 #define CONFIG_SYS_CBSIZE 512
 /* max number of command args */
--
2.29.2

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[PATCH v2 2/6] microblaze: Simplify cache handling

Michal Simek-3
In reply to this post by Michal Simek-3
Enable caches by default. For now just simplify config file but it should
be read from DT or PVRs.

Signed-off-by: Michal Simek <[hidden email]>
---

(no changes since v1)

 include/configs/microblaze-generic.h | 16 ++--------------
 1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index d5b2bd856608..05ea64b16312 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -69,20 +69,8 @@
 # define CONFIG_SYS_MAX_FLASH_SECT 512
 #endif /* !FLASH */
 
-#define XILINX_USE_ICACHE 1
-#define XILINX_USE_DCACHE 1
-
-#if defined(XILINX_USE_ICACHE)
-# define CONFIG_ICACHE
-#else
-# undef CONFIG_ICACHE
-#endif
-
-#if defined(XILINX_USE_DCACHE)
-# define CONFIG_DCACHE
-#else
-# undef CONFIG_DCACHE
-#endif
+#define CONFIG_ICACHE
+#define CONFIG_DCACHE
 
 #ifndef XILINX_DCACHE_BYTE_SIZE
 #define XILINX_DCACHE_BYTE_SIZE 32768
--
2.29.2

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[PATCH v2 3/6] microblaze: Get rid of xparameters.h

Michal Simek-3
In reply to this post by Michal Simek-3
There is no need to use this file anymore. Include it in main config file
and simplify logic based on it.

Signed-off-by: Michal Simek <[hidden email]>
---

(no changes since v1)

 board/xilinx/microblaze-generic/xparameters.h | 18 ------------------
 include/configs/microblaze-generic.h          |  7 ++++++-
 2 files changed, 6 insertions(+), 19 deletions(-)
 delete mode 100644 board/xilinx/microblaze-generic/xparameters.h

diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h
deleted file mode 100644
index 5e0911faf633..000000000000
--- a/board/xilinx/microblaze-generic/xparameters.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal  SIMEK <[hidden email]>
- *
- * CAUTION: This file is a faked configuration !!!
- *          There is no real target for the microblaze-generic
- *          configuration. You have to replace this file with
- *          the generated file from your Xilinx design flow.
- */
-
-/* Microblaze is microblaze_0 */
-#define XILINX_FSL_NUMBER 3
-
-/* Flash Memory is FLASH_2Mx32 */
-#define XILINX_FLASH_START 0x2c000000
-#define XILINX_FLASH_SIZE 0x00800000
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 05ea64b16312..2cfcace7b066 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -8,7 +8,12 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include "../board/xilinx/microblaze-generic/xparameters.h"
+/* Microblaze is microblaze_0 */
+#define XILINX_FSL_NUMBER 3
+
+/* Flash Memory is FLASH_2Mx32 */
+#define XILINX_FLASH_START 0x2c000000
+#define XILINX_FLASH_SIZE 0x00800000
 
 /* MicroBlaze CPU */
 #define MICROBLAZE_V5 1
--
2.29.2

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[PATCH v2 4/6] microblaze: Remove CONFIG_SYS_FDT_SIZE

Michal Simek-3
In reply to this post by Michal Simek-3
CONFIG_SYS_FDT_SIZE is not use anywhere that's why remove it.

Signed-off-by: Michal Simek <[hidden email]>
---

(no changes since v1)

 include/configs/microblaze-generic.h | 1 -
 scripts/config_whitelist.txt         | 1 -
 2 files changed, 2 deletions(-)

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 2cfcace7b066..72550113cefa 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -171,7 +171,6 @@
 
 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
  0x40000)
-#define CONFIG_SYS_FDT_SIZE (16 << 10)
 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
  0x1000000)
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 0aabe7a45165..8b4fcba395a3 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -2170,7 +2170,6 @@ CONFIG_SYS_FCC_PSMR
 CONFIG_SYS_FDT_BASE
 CONFIG_SYS_FDT_LOAD_ADDR
 CONFIG_SYS_FDT_PAD
-CONFIG_SYS_FDT_SIZE
 CONFIG_SYS_FEC0_IOBASE
 CONFIG_SYS_FEC1_IOBASE
 CONFIG_SYS_FECI2C
--
2.29.2

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[PATCH v2 5/6] microblaze: Unify of setting for SPL_NOR/XIP support

Michal Simek-3
In reply to this post by Michal Simek-3
XIP is not enabled in SPL. SPL_NOR is enabled but any macro setting with
using SYS_FLASH_BASE are wrong because it is not aligned with DM.
That's why change these macro and align them with TEXT_BASE macro.
Information should be find at run time based on DT but implementation is
not done yet.

Signed-off-by: Michal Simek <[hidden email]>
---

Changes in v2:
- Rework the whole patch because SPL_NOR is enabled by default.

 include/configs/microblaze-generic.h | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 72550113cefa..c31a7880743f 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -163,14 +163,12 @@
 
 /* SPL part */
 
-#ifdef CONFIG_SYS_FLASH_BASE
-# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
-#endif
+#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
 
 /* for booting directly linux */
+#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_TEXT_BASE + \
+ 0x40000)
 
-#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
- 0x40000)
 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
  0x1000000)
 
--
2.29.2

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[PATCH v2 6/6] microblaze: Detect NOR flash based on DT

Michal Simek-3
In reply to this post by Michal Simek-3
Remove fixed configuration and detect flash based on DT.

Also increase amount of flash sectors to 2048 because on kc705 flash has
1027 sectors.

Bank # 1: CFI conformant flash (16 x 16)  Size: 128 MB in 1027 Sectors
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8962
  Erase timeout: 4096 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 1024 bytes

Signed-off-by: Michal Simek <[hidden email]>
---

(no changes since v1)

 configs/microblaze-generic_defconfig |  2 ++
 include/configs/microblaze-generic.h | 41 ++--------------------------
 2 files changed, 5 insertions(+), 38 deletions(-)

diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index 08c88856dcd9..761cc65cbfab 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -48,8 +48,10 @@ CONFIG_DM_I2C=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MTD=y
+CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index c31a7880743f..bc0bf0497378 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -11,26 +11,11 @@
 /* Microblaze is microblaze_0 */
 #define XILINX_FSL_NUMBER 3
 
-/* Flash Memory is FLASH_2Mx32 */
-#define XILINX_FLASH_START 0x2c000000
-#define XILINX_FLASH_SIZE 0x00800000
-
 /* MicroBlaze CPU */
 #define MICROBLAZE_V5 1
 
 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
 
-/* linear and spi flash memory */
-#ifdef XILINX_FLASH_START
-#define FLASH
-#undef SPIFLASH
-#undef RAMENV /* hold environment in flash */
-#else
-#undef FLASH
-#undef SPIFLASH
-#define RAMENV /* hold environment in RAM */
-#endif
-
 /* uart */
 /* The following table includes the supported baudrates */
 # define CONFIG_SYS_BAUDRATE_TABLE \
@@ -45,34 +30,14 @@
 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
  CONFIG_SYS_MALLOC_F_LEN)
 
-/*
- * CFI flash memory layout - Example
- * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
- * CONFIG_SYS_FLASH_SIZE = 0x0080_0000;  8MB
- *
- * SECT_SIZE = 0x20000; 128kB is one sector
- * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store
- *
- * 0x2200_0000 CONFIG_SYS_FLASH_BASE
- * FREE 256kB
- * 0x2204_0000 CONFIG_ENV_ADDR
- * ENV_AREA 128kB
- * 0x2206_0000
- * FREE
- * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
- *
- */
-
-#ifdef FLASH
-# define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
-# define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
+#ifdef CONFIG_CFI_FLASH
 /* ?empty sector */
 # define CONFIG_SYS_FLASH_EMPTY_INFO 1
 /* max number of memory banks */
 # define CONFIG_SYS_MAX_FLASH_BANKS 1
 /* max number of sectors on one chip */
-# define CONFIG_SYS_MAX_FLASH_SECT 512
-#endif /* !FLASH */
+# define CONFIG_SYS_MAX_FLASH_SECT 2048
+#endif
 
 #define CONFIG_ICACHE
 #define CONFIG_DCACHE
--
2.29.2

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Re: [PATCH v2 0/6] microblaze: Cleanup series

Michal Simek-4
In reply to this post by Michal Simek-3
po 16. 11. 2020 v 16:02 odesílatel Michal Simek
<[hidden email]> napsal:

>
> Hi,
>
> I looked at microblaze configs and clean up some things. All changes were
> done in connection to detect nor flash based on information taken from DT.
>
> Thanks
> Michal
>
> Changes in v2:
> - Rework the whole patch because SPL_NOR is enabled by default.
>
> Michal Simek (6):
>   microblaze: Clean config file from ifdef mess
>   microblaze: Simplify cache handling
>   microblaze: Get rid of xparameters.h
>   microblaze: Remove CONFIG_SYS_FDT_SIZE
>   microblaze: Unify of setting for SPL_NOR/XIP support
>   microblaze: Detect NOR flash based on DT
>
>  board/xilinx/microblaze-generic/xparameters.h | 18 ----
>  configs/microblaze-generic_defconfig          |  2 +
>  include/configs/microblaze-generic.h          | 87 ++-----------------
>  scripts/config_whitelist.txt                  |  1 -
>  4 files changed, 11 insertions(+), 97 deletions(-)
>  delete mode 100644 board/xilinx/microblaze-generic/xparameters.h
>
> --
> 2.29.2
>

Applied.
M

--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs