[PATCH] riscv: fu540: dts: Correct reg size of clint node

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[PATCH] riscv: fu540: dts: Correct reg size of clint node

Pragnesh Patel
Signed-off-by: Pragnesh Patel <[hidden email]>
---
 arch/riscv/dts/fu540-c000-u-boot.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi b/arch/riscv/dts/fu540-c000-u-boot.dtsi
index a06e1b11c6..b7cd600b8c 100644
--- a/arch/riscv/dts/fu540-c000-u-boot.dtsi
+++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
@@ -62,7 +62,7 @@
        &cpu2_intc 3 &cpu2_intc 7
        &cpu3_intc 3 &cpu3_intc 7
        &cpu4_intc 3 &cpu4_intc 7>;
- reg = <0x0 0x2000000 0x0 0xc0000>;
+ reg = <0x0 0x2000000 0x0 0x10000>;
  u-boot,dm-spl;
  };
  prci: clock-controller@10000000 {
--
2.17.1

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Re: [PATCH] riscv: fu540: dts: Correct reg size of clint node

Bin Meng-2
On Tue, Oct 20, 2020 at 1:33 PM Pragnesh Patel
<[hidden email]> wrote:
>
> Signed-off-by: Pragnesh Patel <[hidden email]>
> ---
>  arch/riscv/dts/fu540-c000-u-boot.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Bin Meng <[hidden email]>
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Re: [PATCH] riscv: fu540: dts: Correct reg size of clint node

Rick Chen
In reply to this post by Pragnesh Patel
> From: Pragnesh Patel [mailto:[hidden email]]
> Sent: Tuesday, October 20, 2020 1:33 PM
> To: [hidden email]; [hidden email]; [hidden email]; [hidden email]; [hidden email]
> Cc: [hidden email]; [hidden email]; Rick Jian-Zhi Chen(陳建志); Pragnesh Patel; Bin Meng; Jagan Teki; Sean Anderson
> Subject: [PATCH] riscv: fu540: dts: Correct reg size of clint node
>
> Signed-off-by: Pragnesh Patel <[hidden email]>
> ---
>  arch/riscv/dts/fu540-c000-u-boot.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Rick Chen <[hidden email]>