[PATCH] omap3evm: Update board and defconfig files

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[PATCH] omap3evm: Update board and defconfig files

Derald D. Woods
This patch brings the OMAP3 EVM to a bootable state, on master, as of
v2017.09-rc1.

Signed-off-by: Derald D. Woods <[hidden email]>
---
 board/ti/evm/evm.c          | 126 +++++++++++---
 board/ti/evm/evm.h          |  25 +--
 configs/omap3_evm_defconfig |  67 +++++++-
 include/configs/omap3_evm.h | 390 ++++++++++----------------------------------
 4 files changed, 263 insertions(+), 345 deletions(-)

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index fe8e79312f..e770ac04d0 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -12,6 +12,8 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 #include <common.h>
+#include <dm.h>
+#include <ns16550.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
@@ -22,14 +24,35 @@
 #include <i2c.h>
 #include <twl4030.h>
 #include <asm/mach-types.h>
+#include <asm/omap_musb.h>
 #include <linux/mtd/nand.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/musb.h>
 #include "evm.h"
 
-#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
-#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
+#ifdef CONFIG_USB_EHCI_HCD
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
+
+#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
+#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static const struct ns16550_platdata omap3_evm_serial = {
+ .base = OMAP34XX_UART1,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK,
+ .fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(omap3_evm_uart) = {
+ "ns16550_serial",
+ &omap3_evm_serial
+};
+
 static u32 omap3_evm_version;
 
 u32 get_omap3_evm_rev(void)
@@ -60,25 +83,19 @@ static void omap3_evm_get_revision(void)
  default:
  omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
        }
-#else
+#else /* !CONFIG_CMD_NET */
 #if defined(CONFIG_STATIC_BOARD_REV)
- /*
- * Look for static defintion of the board revision
- */
+ /* Look for static defintion of the board revision */
  omap3_evm_version = CONFIG_STATIC_BOARD_REV;
 #else
- /*
- * Fallback to the default above.
- */
+ /* Fallback to the default above */
  omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
-#endif
-#endif /* CONFIG_CMD_NET */
+#endif /* CONFIG_STATIC_BOARD_REV */
+#endif /* CONFIG_CMD_NET */
 }
 
-#ifdef CONFIG_USB_OMAP3
-/*
- * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
- */
+#if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
+/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
 u8 omap3_evm_need_extvbus(void)
 {
  u8 retval = 0;
@@ -88,7 +105,7 @@ u8 omap3_evm_need_extvbus(void)
 
  return retval;
 }
-#endif
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
 
 /*
  * Routine: board_init
@@ -105,7 +122,7 @@ int board_init(void)
  return 0;
 }
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD)
 /*
  * Routine: get_board_mem_timings
  * Description: If we use SPL then there is no x-loader nor config header
@@ -138,7 +155,34 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
  timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
  timings->mr = MICRON_V_MR_165;
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
+
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+static struct musb_hdrc_config musb_config = {
+ .multipoint     = 1,
+ .dyn_fifo       = 1,
+ .num_eps        = 16,
+ .ram_bits       = 12,
+};
+
+static struct omap_musb_board_data musb_board_data = {
+ .interface_type = MUSB_INTERFACE_ULPI,
+};
+
+static struct musb_hdrc_platform_data musb_plat = {
+#if defined(CONFIG_USB_MUSB_HOST)
+ .mode           = MUSB_HOST,
+#elif defined(CONFIG_USB_MUSB_GADGET)
+ .mode = MUSB_PERIPHERAL,
+#else
+#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
+ .config         = &musb_config,
+ .power          = 100,
+ .platform_ops = &omap2430_ops,
+ .board_data = &musb_board_data,
+};
+#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
 
 /*
  * Routine: misc_init_r
@@ -146,8 +190,9 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
  */
 int misc_init_r(void)
 {
+ twl4030_power_init();
 
-#ifdef CONFIG_SYS_I2C_OMAP34XX
+#if defined(CONFIG_SYS_I2C_OMAP34XX)
  i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
 #endif
 
@@ -161,6 +206,13 @@ int misc_init_r(void)
 #endif
  omap_die_id_display();
 
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+ musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
+#endif
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
+ omap_die_id_usbethaddr();
+#endif
  return 0;
 }
 
@@ -175,7 +227,7 @@ void set_muxconf_regs(void)
  MUX_EVM();
 }
 
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET)
 /*
  * Routine: setup_net_chip
  * Description: Setting up the configuration GPMC registers specific to the
@@ -237,7 +289,7 @@ static void reset_net_chip(void)
 int board_eth_init(bd_t *bis)
 {
  int rc = 0;
-#ifdef CONFIG_SMC911X
+#if defined(CONFIG_SMC911X)
 #define STR_ENV_ETHADDR "ethaddr"
 
  struct eth_device *dev;
@@ -254,7 +306,7 @@ int board_eth_init(bd_t *bis)
  rc = -1;
  }
  }
-#endif
+#endif /* CONFIG_SMC911X */
  return rc;
 }
 #endif /* CONFIG_CMD_NET */
@@ -264,11 +316,35 @@ int board_mmc_init(bd_t *bis)
 {
  return omap_mmc_init(0, 0, 0, -1, -1);
 }
-#endif
 
-#if defined(CONFIG_MMC)
 void board_mmc_power_init(void)
 {
  twl4030_power_mmc_init(0);
 }
-#endif
+#endif /* CONFIG_MMC */
+
+#if defined(CONFIG_USB_EHCI_HCD)
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(int index)
+{
+ return omap_ehci_hcd_stop();
+}
+#endif /* CONFIG_USB_EHCI_HCD */
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
+int board_eth_init(bd_t *bis)
+{
+ return usb_eth_initialize(bis);
+}
+#endif /* CONFIG_USB_ETHER */
diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h
index 91e9b88c54..0f8268b33e 100644
--- a/board/ti/evm/evm.h
+++ b/board/ti/evm/evm.h
@@ -278,12 +278,19 @@ static void reset_net_chip(void);
  /* TS_PEN_IRQ */\
  MUX_VAL(CP(MCSPI1_CS2), (IEN  | PTU | DIS | M4)) /*GPIO_176*/\
  /* - LAN_INTR*/\
- MUX_VAL(CP(MCSPI1_CS3), (IEN  | PTD | EN  | M0)) /*McSPI1_CS3*/\
- MUX_VAL(CP(MCSPI2_CLK), (IEN  | PTD | DIS | M0)) /*McSPI2_CLK*/\
- MUX_VAL(CP(MCSPI2_SIMO), (IEN  | PTD | DIS | M0)) /*McSPI2_SIMO*/\
- MUX_VAL(CP(MCSPI2_SOMI), (IEN  | PTD | DIS | M0)) /*McSPI2_SOMI*/\
- MUX_VAL(CP(MCSPI2_CS0), (IEN  | PTD | EN  | M0)) /*McSPI2_CS0*/\
- MUX_VAL(CP(MCSPI2_CS1), (IEN  | PTD | EN  | M0)) /*McSPI2_CS1*/\
+ /* USB EHCI (port 2) */\
+ MUX_VAL(CP(MCSPI1_CS3), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA2*/\
+ MUX_VAL(CP(MCSPI2_CLK), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA7*/\
+ MUX_VAL(CP(MCSPI2_SIMO), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA4*/\
+ MUX_VAL(CP(MCSPI2_SOMI), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA5*/\
+ MUX_VAL(CP(MCSPI2_CS0), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA6*/\
+ MUX_VAL(CP(MCSPI2_CS1), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA3*/\
+ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
+ MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
+ MUX_VAL(CP(ETK_D12_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DIR*/\
+ MUX_VAL(CP(ETK_D13_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_NXT*/\
+ MUX_VAL(CP(ETK_D14_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA0*/\
+ MUX_VAL(CP(ETK_D15_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA1*/\
  /*Control and debug */\
  MUX_VAL(CP(SYS_32K), (IEN  | PTD | DIS | M0)) /*SYS_32K*/\
  MUX_VAL(CP(SYS_CLKREQ), (IEN  | PTD | DIS | M0)) /*SYS_CLKREQ*/\
@@ -318,12 +325,6 @@ static void reset_net_chip(void);
  MUX_VAL(CP(ETK_D7_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D7*/\
  MUX_VAL(CP(ETK_D8_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D8*/\
  MUX_VAL(CP(ETK_D9_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D9*/\
- MUX_VAL(CP(ETK_D10_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D10*/\
- MUX_VAL(CP(ETK_D11_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D11*/\
- MUX_VAL(CP(ETK_D12_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D12*/\
- MUX_VAL(CP(ETK_D13_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D13*/\
- MUX_VAL(CP(ETK_D14_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D14*/\
- MUX_VAL(CP(ETK_D15_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D15*/\
  /*Die to Die */\
  MUX_VAL(CP(D2D_MCAD1), (IEN  | PTD | EN  | M0)) /*d2d_mcad1*/\
  MUX_VAL(CP(D2D_MCAD2), (IEN  | PTD | EN  | M0)) /*d2d_mcad2*/\
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index d29e43701c..145436aea2 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -1,32 +1,83 @@
 CONFIG_ARM=y
-# CONFIG_SYS_THUMB_BUILD is not set
 CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_OMAP34XX=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MPUCLK=720
 CONFIG_TARGET_OMAP3_EVM=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_ENV_IS_IN_NAND=y
+# CONFIG_ENV_IS_IN_FAT is not set
 CONFIG_BOOTDELAY=3
+CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_SPL=y
-# CONFIG_SPL_EXT_SUPPORT is not set
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="OMAP3_EVM # "
+CONFIG_VERSION_VARIABLE=y
+CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_EEPROM is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1792k(u-boot),128k(dtb),128k(u-boot-env),6m(kernel),-(rootfs)"
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBIFS=y
+CONFIG_ISO_PARTITION=y
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
+CONFIG_BAUDRATE=115200
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+CONFIG_SERIAL_PRESENT=y
+CONFIG_SPL_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_IRQ_BUFFER is not set
+CONFIG_SPL_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
-CONFIG_USB_STORAGE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0x5678
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+CONFIG_RBTREE=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_OF_LIBFDT=y
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 70cd0ea27e..ead2b1e556 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -14,349 +14,139 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 
-#ifndef __OMAP3EVM_CONFIG_H
-#define __OMAP3EVM_CONFIG_H
+#ifndef __CONFIG_H
+#define __CONFIG_H
 
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap.h>
+#define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
 
-/* ----------------------------------------------------------------------------
- * Supported U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_LONGHELP
-
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Add auto-completion support */
-#define CONFIG_AUTO_COMPLETE
-
-/* ----------------------------------------------------------------------------
- * Supported hardware
- * ----------------------------------------------------------------------------
- */
-
-/* SPL */
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-/* Partition tables */
-
-/* USB
- *
- * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
- * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
- */
-#define CONFIG_USB_OMAP3
-#define CONFIG_USB_MUSB_HCD
-/* #define CONFIG_USB_MUSB_UDC */
-
-/* NAND SPL */
-#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
- 10, 11, 12, 13}
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
-#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-
-/*
- * High level configuration options
- */
-
-#define CONFIG_SDRC /* The chip has SDRC controller */
-
-/*
- * Clock related definitions
- */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-
-/* Size of environment - 128KB */
-#define CONFIG_ENV_SIZE (128 << 10)
-
-/* Size of malloc pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
-
-/*
- * Physical Memory Map
- * Note 1: CS1 may or may not be populated
- * Note 2: SDRAM size is expected to be at least 32MB
- */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
-
-/* Limits for memtest */
-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
- 0x01F00000) /* 31MB */
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
-
-/* -----------------------------------------------------------------------------
- * Hardware drivers
- * -----------------------------------------------------------------------------
- */
-
-/*
- * NS16550 Configuration
- */
-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
-#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
- 115200}
-
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
-
-/*
- * PISMO support
- */
-/* Monitor at start of flash - Reserve 2 sectors */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-
-/* Start location & size of environment */
-#define ONENAND_ENV_OFFSET 0x260000
-#define SMNAND_ENV_OFFSET 0x260000
-
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+#include <configs/ti_omap3_common.h>
 
 /*
- * NAND
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
  */
-/* Physical address to access NAND */
-#define CONFIG_SYS_NAND_ADDR NAND_BASE
-
-/* Physical address to access NAND at CS0 */
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-
-/* Max number of NAND devices */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-/* Timeout values (in ticks) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
- CONFIG_SYS_MAX_NAND_DEVICE)
-
-#define CONFIG_SYS_JFFS2_MEM_NAND
-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
-
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV "nand0"
-/* Start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET 0x680000
-/* Size of jffs2 partition */
-#define CONFIG_JFFS2_PART_SIZE 0xf980000
-
-/*
- * USB
- */
-#ifdef CONFIG_USB_OMAP3
-
-#ifdef CONFIG_USB_MUSB_HCD
-
-#ifdef CONFIG_USB_KEYBOARD
-#define CONFIG_SYS_USB_EVENT_POLL
-#define CONFIG_PREBOOT "usb start"
-#endif /* CONFIG_USB_KEYBOARD */
-
-#endif /* CONFIG_USB_MUSB_HCD */
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE            0x40200000
 
-#ifdef CONFIG_USB_MUSB_UDC
-/* USB device configuration */
-#define CONFIG_USB_DEVICE
-#define CONFIG_USB_TTY
-
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID 0x0451
-#define CONFIG_USBD_PRODUCTID 0x5678
-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME "EVM"
-#endif /* CONFIG_USB_MUSB_UDC */
-
-#endif /* CONFIG_USB_OMAP3 */
-
-/* ----------------------------------------------------------------------------
- * U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
+#define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 
-/* Size of Console IO buffer */
-#define CONFIG_SYS_CBSIZE 512
-
-/* Size of print buffer */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* Size of bootarg buffer */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-
-#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_SYS_I2C_OMAP34XX
 
-/*
- * NAND / OneNAND
- */
-#if defined(CONFIG_CMD_NAND)
+/* Override OMAP3 serial console configuration */
+#undef CONFIG_CONS_INDEX
+#define CONFIG_CONS_INDEX               1
+#define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
+#if defined(CONFIG_SPL_BUILD)
+#undef CONFIG_SYS_NS16550_REG_SIZE
+#else /* !CONFIG_SPL_BUILD  */
+#define CONFIG_SYS_NS16550_REG_SIZE     (-1)
+#endif /* CONFIG_SPL_BUILD */
+
+/* NAND */
+#if defined(CONFIG_NAND)
+#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_FLASH_BASE NAND_BASE
+#define CONFIG_SYS_MAX_NAND_DEVICE      1
+#define CONFIG_BCH
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT      64
+#define CONFIG_SYS_NAND_PAGE_SIZE       2048
+#define CONFIG_SYS_NAND_OOBSIZE         64
+#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
+                                         10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE         512
+#define CONFIG_SYS_NAND_ECCBYTES        3
+#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
+#define CONFIG_ENV_IS_IN_NAND           1
+#define CONFIG_ENV_SIZE                 (128 << 10) /* 128 KiB */
+#define SMNAND_ENV_OFFSET               0x260000    /* environment starts here */
+#define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
+#define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
+#define CONFIG_MTD_PARTITIONS           /* required for UBI partition support */
+#endif /* CONFIG_NAND */
 
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
-#endif
+#define CONFIG_USB_OMAP3
 
-#if !defined(CONFIG_ENV_IS_NOWHERE)
-#if defined(CONFIG_CMD_NAND)
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
-#endif
-#endif /* CONFIG_ENV_IS_NOWHERE */
+/* MUSB */
+#define CONFIG_USB_MUSB_OMAP2PLUS
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETHER_RNDIS
 
-#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
+/* USB EHCI */
+#define CONFIG_SYS_USB_FAT_BOOT_PARTITION  1
 
+/* SMSC911x Ethernet */
 #if defined(CONFIG_CMD_NET)
-
-/* Ethernet (SMSC9115 from SMSC9118 family) */
 #define CONFIG_SMC911X
 #define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE 0x2C000000
-
-/* BOOTP fields */
-#define CONFIG_BOOTP_SUBNETMASK 0x00000001
-#define CONFIG_BOOTP_GATEWAY 0x00000002
-#define CONFIG_BOOTP_HOSTNAME 0x00000004
-#define CONFIG_BOOTP_BOOTPATH 0x00000010
-
+#define CONFIG_SMC911X_BASE             0x2C000000
 #endif /* CONFIG_CMD_NET */
 
-/* Support for relocation */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-
-/* -----------------------------------------------------------------------------
- * Board specific
- * -----------------------------------------------------------------------------
- */
-
-/* Uncomment to define the board revision statically */
-/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
-
-/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
- CONFIG_SPL_TEXT_BASE)
-
-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
-
-#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80100000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-
-/* -----------------------------------------------------------------------------
- * Default environment
- * -----------------------------------------------------------------------------
- */
+/* Environment */
+#define CONFIG_PREBOOT                  "usb start"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  "loadaddr=0x82000000\0" \
  "usbtty=cdc_acm\0" \
  "mmcdev=0\0" \
  "console=ttyO0,115200n8\0" \
  "mmcargs=setenv bootargs console=${console} " \
+ "${optargs} " \
  "root=/dev/mmcblk0p2 rw " \
- "rootfstype=ext3 rootwait\0" \
+ "rootfstype=ext4 rootwait\0" \
  "nandargs=setenv bootargs console=${console} " \
- "root=/dev/mtdblock4 rw " \
- "rootfstype=jffs2\0" \
+ "${optargs} " \
+ "root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
+ "rootfstype=ubifs rootwait\0" \
  "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  "bootscript=echo Running bootscript from mmc ...; " \
  "source ${loadaddr}\0" \
- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc ...; " \
+ "loaduimage=setenv bootfile uImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+ "loadzimage=setenv bootfile zImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
+ "loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
+ "mmcboot=echo Booting ${bootfile} from mmc ...; " \
+ "run mmcargs; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0" \
+ "mmcbootz=echo Booting ${bootfile} from mmc ...; " \
  "run mmcargs; " \
- "bootm ${loadaddr}\0" \
- "nandboot=echo Booting from nand ...; " \
+ "bootz ${loadaddr} - ${fdtaddr}\0" \
+ "nandboot=echo Booting uImage from nand ...; " \
  "run nandargs; " \
- "onenand read ${loadaddr} 280000 400000; " \
- "bootm ${loadaddr}\0" \
+ "nand read ${loadaddr} kernel; " \
+ "nand read ${fdtaddr} dtb; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0"
 
 #define CONFIG_BOOTCOMMAND \
  "mmc dev ${mmcdev}; if mmc rescan; then " \
  "if run loadbootscript; then " \
  "run bootscript; " \
  "else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run nandboot; " \
- "fi; " \
+ "if run loadzimage && run loaddtb; then " \
+ "run mmcbootz; fi; " \
+ "if run loaduimage && run loaddtb; then " \
+ "run mmcboot; fi; " \
+ "run nandboot; " \
  "fi; " \
  "else run nandboot; fi"
 
-#endif /* __OMAP3EVM_CONFIG_H */
+#endif /* __CONFIG_H */
--
2.13.0

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Re: [PATCH] omap3evm: Update board and defconfig files

Tom Rini-4
On Wed, Aug 02, 2017 at 10:00:06PM -0500, Derald D. Woods wrote:

> This patch brings the OMAP3 EVM to a bootable state, on master, as of
> v2017.09-rc1.
>
> Signed-off-by: Derald D. Woods <[hidden email]>

Reviewed-by: Tom Rini <[hidden email]>

Thanks.  Since you have one of these boards, would you like to take over
maintainership of it?  That means booting it at least once every 2
months, ideally (at least on the final -rc before release, which is
pretty consistently scheduled) to catch bugs like this.  Thanks again!

--
Tom

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Re: [PATCH] omap3evm: Update board and defconfig files

Derald D. Woods
On Thu, Aug 3, 2017 at 6:31 AM, Tom Rini <[hidden email]> wrote:

> On Wed, Aug 02, 2017 at 10:00:06PM -0500, Derald D. Woods wrote:
>
> > This patch brings the OMAP3 EVM to a bootable state, on master, as of
> > v2017.09-rc1.
> >
> > Signed-off-by: Derald D. Woods <[hidden email]>
>
> Reviewed-by: Tom Rini <[hidden email]>
>
> Thanks.  Since you have one of these boards, would you like to take over
> maintainership of it?


​Yes. I do have this board, with the OMAP3530 processor module, and will be
able to test releases.

On a side note, I recently posted the following:

http://u-boot.10912.n7.nabble.com/PATCH-arm-omap-Fix-get-device-type-for-OMAP34XX-td300937.html#a300993

I verified the small patch with omap3evm, beagleboard(revc4), and overo.
CPU information can be directly read, as it was previously. Is there some
consistent road-map for SRAM usage for OMAP34XX specifically?

Derald



> That means booting it at least once every 2
> months, ideally (at least on the final -rc before release, which is
> pretty consistently scheduled) to catch bugs like this.  Thanks again!
>
--
> Tom
>

​​
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Re: [PATCH] omap3evm: Update board and defconfig files

Tom Rini-4
On Thu, Aug 03, 2017 at 07:37:34AM -0500, Derald Woods wrote:

> On Thu, Aug 3, 2017 at 6:31 AM, Tom Rini <[hidden email]> wrote:
>
> > On Wed, Aug 02, 2017 at 10:00:06PM -0500, Derald D. Woods wrote:
> >
> > > This patch brings the OMAP3 EVM to a bootable state, on master, as of
> > > v2017.09-rc1.
> > >
> > > Signed-off-by: Derald D. Woods <[hidden email]>
> >
> > Reviewed-by: Tom Rini <[hidden email]>
> >
> > Thanks.  Since you have one of these boards, would you like to take over
> > maintainership of it?
>
>
> ​Yes. I do have this board, with the OMAP3530 processor module, and will be
> able to test releases.
>
> On a side note, I recently posted the following:
>
> http://u-boot.10912.n7.nabble.com/PATCH-arm-omap-Fix-get-device-type-for-OMAP34XX-td300937.html#a300993
>
> I verified the small patch with omap3evm, beagleboard(revc4), and overo.
> CPU information can be directly read, as it was previously. Is there some
> consistent road-map for SRAM usage for OMAP34XX specifically?
Ah yes, I had that on my to reply to list, sorry.  What I was wondering
was, why does current mainline fail?  I had tested that series on the
beagleboard xM but indeed not on plain beagleboard.

--
Tom

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[PATCH v2] omap3evm: Update board and defconfig files

Derald D. Woods
In reply to this post by Derald D. Woods
This patch brings the OMAP3 EVM to a bootable state, on master, as of
v2017.09-rc1.

Signed-off-by: Derald D. Woods <[hidden email]>

---
Changes in v2:
- Unset {EFI,ISO}_PARTITION
- Unset EFI_LOADER
- Unset SPL_EXT_SUPPORT
- Unset THUMB_BUILD
** It does boot with THUMB_BUILD, it just should not be default

---
 board/ti/evm/evm.c          | 126 +++++++++++---
 board/ti/evm/evm.h          |  25 +--
 configs/omap3_evm_defconfig |  70 +++++++-
 include/configs/omap3_evm.h | 390 ++++++++++----------------------------------
 4 files changed, 268 insertions(+), 343 deletions(-)

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index fe8e79312f..e770ac04d0 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -12,6 +12,8 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 #include <common.h>
+#include <dm.h>
+#include <ns16550.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
@@ -22,14 +24,35 @@
 #include <i2c.h>
 #include <twl4030.h>
 #include <asm/mach-types.h>
+#include <asm/omap_musb.h>
 #include <linux/mtd/nand.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/musb.h>
 #include "evm.h"
 
-#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
-#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
+#ifdef CONFIG_USB_EHCI_HCD
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
+
+#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
+#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static const struct ns16550_platdata omap3_evm_serial = {
+ .base = OMAP34XX_UART1,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK,
+ .fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(omap3_evm_uart) = {
+ "ns16550_serial",
+ &omap3_evm_serial
+};
+
 static u32 omap3_evm_version;
 
 u32 get_omap3_evm_rev(void)
@@ -60,25 +83,19 @@ static void omap3_evm_get_revision(void)
  default:
  omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
        }
-#else
+#else /* !CONFIG_CMD_NET */
 #if defined(CONFIG_STATIC_BOARD_REV)
- /*
- * Look for static defintion of the board revision
- */
+ /* Look for static defintion of the board revision */
  omap3_evm_version = CONFIG_STATIC_BOARD_REV;
 #else
- /*
- * Fallback to the default above.
- */
+ /* Fallback to the default above */
  omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
-#endif
-#endif /* CONFIG_CMD_NET */
+#endif /* CONFIG_STATIC_BOARD_REV */
+#endif /* CONFIG_CMD_NET */
 }
 
-#ifdef CONFIG_USB_OMAP3
-/*
- * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
- */
+#if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
+/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
 u8 omap3_evm_need_extvbus(void)
 {
  u8 retval = 0;
@@ -88,7 +105,7 @@ u8 omap3_evm_need_extvbus(void)
 
  return retval;
 }
-#endif
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
 
 /*
  * Routine: board_init
@@ -105,7 +122,7 @@ int board_init(void)
  return 0;
 }
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD)
 /*
  * Routine: get_board_mem_timings
  * Description: If we use SPL then there is no x-loader nor config header
@@ -138,7 +155,34 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
  timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
  timings->mr = MICRON_V_MR_165;
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
+
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+static struct musb_hdrc_config musb_config = {
+ .multipoint     = 1,
+ .dyn_fifo       = 1,
+ .num_eps        = 16,
+ .ram_bits       = 12,
+};
+
+static struct omap_musb_board_data musb_board_data = {
+ .interface_type = MUSB_INTERFACE_ULPI,
+};
+
+static struct musb_hdrc_platform_data musb_plat = {
+#if defined(CONFIG_USB_MUSB_HOST)
+ .mode           = MUSB_HOST,
+#elif defined(CONFIG_USB_MUSB_GADGET)
+ .mode = MUSB_PERIPHERAL,
+#else
+#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
+ .config         = &musb_config,
+ .power          = 100,
+ .platform_ops = &omap2430_ops,
+ .board_data = &musb_board_data,
+};
+#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
 
 /*
  * Routine: misc_init_r
@@ -146,8 +190,9 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
  */
 int misc_init_r(void)
 {
+ twl4030_power_init();
 
-#ifdef CONFIG_SYS_I2C_OMAP34XX
+#if defined(CONFIG_SYS_I2C_OMAP34XX)
  i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
 #endif
 
@@ -161,6 +206,13 @@ int misc_init_r(void)
 #endif
  omap_die_id_display();
 
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+ musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
+#endif
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
+ omap_die_id_usbethaddr();
+#endif
  return 0;
 }
 
@@ -175,7 +227,7 @@ void set_muxconf_regs(void)
  MUX_EVM();
 }
 
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET)
 /*
  * Routine: setup_net_chip
  * Description: Setting up the configuration GPMC registers specific to the
@@ -237,7 +289,7 @@ static void reset_net_chip(void)
 int board_eth_init(bd_t *bis)
 {
  int rc = 0;
-#ifdef CONFIG_SMC911X
+#if defined(CONFIG_SMC911X)
 #define STR_ENV_ETHADDR "ethaddr"
 
  struct eth_device *dev;
@@ -254,7 +306,7 @@ int board_eth_init(bd_t *bis)
  rc = -1;
  }
  }
-#endif
+#endif /* CONFIG_SMC911X */
  return rc;
 }
 #endif /* CONFIG_CMD_NET */
@@ -264,11 +316,35 @@ int board_mmc_init(bd_t *bis)
 {
  return omap_mmc_init(0, 0, 0, -1, -1);
 }
-#endif
 
-#if defined(CONFIG_MMC)
 void board_mmc_power_init(void)
 {
  twl4030_power_mmc_init(0);
 }
-#endif
+#endif /* CONFIG_MMC */
+
+#if defined(CONFIG_USB_EHCI_HCD)
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(int index)
+{
+ return omap_ehci_hcd_stop();
+}
+#endif /* CONFIG_USB_EHCI_HCD */
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
+int board_eth_init(bd_t *bis)
+{
+ return usb_eth_initialize(bis);
+}
+#endif /* CONFIG_USB_ETHER */
diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h
index 91e9b88c54..0f8268b33e 100644
--- a/board/ti/evm/evm.h
+++ b/board/ti/evm/evm.h
@@ -278,12 +278,19 @@ static void reset_net_chip(void);
  /* TS_PEN_IRQ */\
  MUX_VAL(CP(MCSPI1_CS2), (IEN  | PTU | DIS | M4)) /*GPIO_176*/\
  /* - LAN_INTR*/\
- MUX_VAL(CP(MCSPI1_CS3), (IEN  | PTD | EN  | M0)) /*McSPI1_CS3*/\
- MUX_VAL(CP(MCSPI2_CLK), (IEN  | PTD | DIS | M0)) /*McSPI2_CLK*/\
- MUX_VAL(CP(MCSPI2_SIMO), (IEN  | PTD | DIS | M0)) /*McSPI2_SIMO*/\
- MUX_VAL(CP(MCSPI2_SOMI), (IEN  | PTD | DIS | M0)) /*McSPI2_SOMI*/\
- MUX_VAL(CP(MCSPI2_CS0), (IEN  | PTD | EN  | M0)) /*McSPI2_CS0*/\
- MUX_VAL(CP(MCSPI2_CS1), (IEN  | PTD | EN  | M0)) /*McSPI2_CS1*/\
+ /* USB EHCI (port 2) */\
+ MUX_VAL(CP(MCSPI1_CS3), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA2*/\
+ MUX_VAL(CP(MCSPI2_CLK), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA7*/\
+ MUX_VAL(CP(MCSPI2_SIMO), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA4*/\
+ MUX_VAL(CP(MCSPI2_SOMI), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA5*/\
+ MUX_VAL(CP(MCSPI2_CS0), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA6*/\
+ MUX_VAL(CP(MCSPI2_CS1), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA3*/\
+ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
+ MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
+ MUX_VAL(CP(ETK_D12_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DIR*/\
+ MUX_VAL(CP(ETK_D13_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_NXT*/\
+ MUX_VAL(CP(ETK_D14_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA0*/\
+ MUX_VAL(CP(ETK_D15_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA1*/\
  /*Control and debug */\
  MUX_VAL(CP(SYS_32K), (IEN  | PTD | DIS | M0)) /*SYS_32K*/\
  MUX_VAL(CP(SYS_CLKREQ), (IEN  | PTD | DIS | M0)) /*SYS_CLKREQ*/\
@@ -318,12 +325,6 @@ static void reset_net_chip(void);
  MUX_VAL(CP(ETK_D7_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D7*/\
  MUX_VAL(CP(ETK_D8_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D8*/\
  MUX_VAL(CP(ETK_D9_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D9*/\
- MUX_VAL(CP(ETK_D10_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D10*/\
- MUX_VAL(CP(ETK_D11_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D11*/\
- MUX_VAL(CP(ETK_D12_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D12*/\
- MUX_VAL(CP(ETK_D13_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D13*/\
- MUX_VAL(CP(ETK_D14_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D14*/\
- MUX_VAL(CP(ETK_D15_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D15*/\
  /*Die to Die */\
  MUX_VAL(CP(D2D_MCAD1), (IEN  | PTD | EN  | M0)) /*d2d_mcad1*/\
  MUX_VAL(CP(D2D_MCAD2), (IEN  | PTD | EN  | M0)) /*d2d_mcad2*/\
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index d29e43701c..d2f86260bb 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -1,32 +1,90 @@
 CONFIG_ARM=y
 # CONFIG_SYS_THUMB_BUILD is not set
+# CONFIG_SPL_SYS_THUMB_BUILD is not set
 CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_OMAP34XX=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MPUCLK=720
 CONFIG_TARGET_OMAP3_EVM=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_ENV_IS_IN_NAND=y
+# CONFIG_ENV_IS_IN_FAT is not set
 CONFIG_BOOTDELAY=3
+CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
 # CONFIG_SPL_EXT_SUPPORT is not set
+CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="OMAP3_EVM # "
+CONFIG_VERSION_VARIABLE=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_BOOTEFI is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_EEPROM is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1792k(u-boot),128k(dtb),128k(u-boot-env),6m(kernel),-(rootfs)"
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBIFS=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_PARTITION_UUIDS=y
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
+CONFIG_BAUDRATE=115200
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+CONFIG_SERIAL_PRESENT=y
+CONFIG_SPL_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_IRQ_BUFFER is not set
+CONFIG_SPL_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
-CONFIG_USB_STORAGE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0x5678
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+CONFIG_RBTREE=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 70cd0ea27e..ead2b1e556 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -14,349 +14,139 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 
-#ifndef __OMAP3EVM_CONFIG_H
-#define __OMAP3EVM_CONFIG_H
+#ifndef __CONFIG_H
+#define __CONFIG_H
 
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap.h>
+#define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
 
-/* ----------------------------------------------------------------------------
- * Supported U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_LONGHELP
-
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Add auto-completion support */
-#define CONFIG_AUTO_COMPLETE
-
-/* ----------------------------------------------------------------------------
- * Supported hardware
- * ----------------------------------------------------------------------------
- */
-
-/* SPL */
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-/* Partition tables */
-
-/* USB
- *
- * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
- * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
- */
-#define CONFIG_USB_OMAP3
-#define CONFIG_USB_MUSB_HCD
-/* #define CONFIG_USB_MUSB_UDC */
-
-/* NAND SPL */
-#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
- 10, 11, 12, 13}
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
-#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-
-/*
- * High level configuration options
- */
-
-#define CONFIG_SDRC /* The chip has SDRC controller */
-
-/*
- * Clock related definitions
- */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-
-/* Size of environment - 128KB */
-#define CONFIG_ENV_SIZE (128 << 10)
-
-/* Size of malloc pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
-
-/*
- * Physical Memory Map
- * Note 1: CS1 may or may not be populated
- * Note 2: SDRAM size is expected to be at least 32MB
- */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
-
-/* Limits for memtest */
-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
- 0x01F00000) /* 31MB */
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
-
-/* -----------------------------------------------------------------------------
- * Hardware drivers
- * -----------------------------------------------------------------------------
- */
-
-/*
- * NS16550 Configuration
- */
-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
-#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
- 115200}
-
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
-
-/*
- * PISMO support
- */
-/* Monitor at start of flash - Reserve 2 sectors */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-
-/* Start location & size of environment */
-#define ONENAND_ENV_OFFSET 0x260000
-#define SMNAND_ENV_OFFSET 0x260000
-
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+#include <configs/ti_omap3_common.h>
 
 /*
- * NAND
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
  */
-/* Physical address to access NAND */
-#define CONFIG_SYS_NAND_ADDR NAND_BASE
-
-/* Physical address to access NAND at CS0 */
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-
-/* Max number of NAND devices */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-/* Timeout values (in ticks) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
- CONFIG_SYS_MAX_NAND_DEVICE)
-
-#define CONFIG_SYS_JFFS2_MEM_NAND
-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
-
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV "nand0"
-/* Start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET 0x680000
-/* Size of jffs2 partition */
-#define CONFIG_JFFS2_PART_SIZE 0xf980000
-
-/*
- * USB
- */
-#ifdef CONFIG_USB_OMAP3
-
-#ifdef CONFIG_USB_MUSB_HCD
-
-#ifdef CONFIG_USB_KEYBOARD
-#define CONFIG_SYS_USB_EVENT_POLL
-#define CONFIG_PREBOOT "usb start"
-#endif /* CONFIG_USB_KEYBOARD */
-
-#endif /* CONFIG_USB_MUSB_HCD */
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE            0x40200000
 
-#ifdef CONFIG_USB_MUSB_UDC
-/* USB device configuration */
-#define CONFIG_USB_DEVICE
-#define CONFIG_USB_TTY
-
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID 0x0451
-#define CONFIG_USBD_PRODUCTID 0x5678
-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME "EVM"
-#endif /* CONFIG_USB_MUSB_UDC */
-
-#endif /* CONFIG_USB_OMAP3 */
-
-/* ----------------------------------------------------------------------------
- * U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
+#define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 
-/* Size of Console IO buffer */
-#define CONFIG_SYS_CBSIZE 512
-
-/* Size of print buffer */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* Size of bootarg buffer */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-
-#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_SYS_I2C_OMAP34XX
 
-/*
- * NAND / OneNAND
- */
-#if defined(CONFIG_CMD_NAND)
+/* Override OMAP3 serial console configuration */
+#undef CONFIG_CONS_INDEX
+#define CONFIG_CONS_INDEX               1
+#define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
+#if defined(CONFIG_SPL_BUILD)
+#undef CONFIG_SYS_NS16550_REG_SIZE
+#else /* !CONFIG_SPL_BUILD  */
+#define CONFIG_SYS_NS16550_REG_SIZE     (-1)
+#endif /* CONFIG_SPL_BUILD */
+
+/* NAND */
+#if defined(CONFIG_NAND)
+#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_FLASH_BASE NAND_BASE
+#define CONFIG_SYS_MAX_NAND_DEVICE      1
+#define CONFIG_BCH
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT      64
+#define CONFIG_SYS_NAND_PAGE_SIZE       2048
+#define CONFIG_SYS_NAND_OOBSIZE         64
+#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
+                                         10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE         512
+#define CONFIG_SYS_NAND_ECCBYTES        3
+#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
+#define CONFIG_ENV_IS_IN_NAND           1
+#define CONFIG_ENV_SIZE                 (128 << 10) /* 128 KiB */
+#define SMNAND_ENV_OFFSET               0x260000    /* environment starts here */
+#define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
+#define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
+#define CONFIG_MTD_PARTITIONS           /* required for UBI partition support */
+#endif /* CONFIG_NAND */
 
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
-#endif
+#define CONFIG_USB_OMAP3
 
-#if !defined(CONFIG_ENV_IS_NOWHERE)
-#if defined(CONFIG_CMD_NAND)
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
-#endif
-#endif /* CONFIG_ENV_IS_NOWHERE */
+/* MUSB */
+#define CONFIG_USB_MUSB_OMAP2PLUS
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETHER_RNDIS
 
-#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
+/* USB EHCI */
+#define CONFIG_SYS_USB_FAT_BOOT_PARTITION  1
 
+/* SMSC911x Ethernet */
 #if defined(CONFIG_CMD_NET)
-
-/* Ethernet (SMSC9115 from SMSC9118 family) */
 #define CONFIG_SMC911X
 #define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE 0x2C000000
-
-/* BOOTP fields */
-#define CONFIG_BOOTP_SUBNETMASK 0x00000001
-#define CONFIG_BOOTP_GATEWAY 0x00000002
-#define CONFIG_BOOTP_HOSTNAME 0x00000004
-#define CONFIG_BOOTP_BOOTPATH 0x00000010
-
+#define CONFIG_SMC911X_BASE             0x2C000000
 #endif /* CONFIG_CMD_NET */
 
-/* Support for relocation */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-
-/* -----------------------------------------------------------------------------
- * Board specific
- * -----------------------------------------------------------------------------
- */
-
-/* Uncomment to define the board revision statically */
-/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
-
-/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
- CONFIG_SPL_TEXT_BASE)
-
-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
-
-#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80100000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-
-/* -----------------------------------------------------------------------------
- * Default environment
- * -----------------------------------------------------------------------------
- */
+/* Environment */
+#define CONFIG_PREBOOT                  "usb start"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  "loadaddr=0x82000000\0" \
  "usbtty=cdc_acm\0" \
  "mmcdev=0\0" \
  "console=ttyO0,115200n8\0" \
  "mmcargs=setenv bootargs console=${console} " \
+ "${optargs} " \
  "root=/dev/mmcblk0p2 rw " \
- "rootfstype=ext3 rootwait\0" \
+ "rootfstype=ext4 rootwait\0" \
  "nandargs=setenv bootargs console=${console} " \
- "root=/dev/mtdblock4 rw " \
- "rootfstype=jffs2\0" \
+ "${optargs} " \
+ "root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
+ "rootfstype=ubifs rootwait\0" \
  "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  "bootscript=echo Running bootscript from mmc ...; " \
  "source ${loadaddr}\0" \
- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc ...; " \
+ "loaduimage=setenv bootfile uImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+ "loadzimage=setenv bootfile zImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
+ "loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
+ "mmcboot=echo Booting ${bootfile} from mmc ...; " \
+ "run mmcargs; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0" \
+ "mmcbootz=echo Booting ${bootfile} from mmc ...; " \
  "run mmcargs; " \
- "bootm ${loadaddr}\0" \
- "nandboot=echo Booting from nand ...; " \
+ "bootz ${loadaddr} - ${fdtaddr}\0" \
+ "nandboot=echo Booting uImage from nand ...; " \
  "run nandargs; " \
- "onenand read ${loadaddr} 280000 400000; " \
- "bootm ${loadaddr}\0" \
+ "nand read ${loadaddr} kernel; " \
+ "nand read ${fdtaddr} dtb; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0"
 
 #define CONFIG_BOOTCOMMAND \
  "mmc dev ${mmcdev}; if mmc rescan; then " \
  "if run loadbootscript; then " \
  "run bootscript; " \
  "else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run nandboot; " \
- "fi; " \
+ "if run loadzimage && run loaddtb; then " \
+ "run mmcbootz; fi; " \
+ "if run loaduimage && run loaddtb; then " \
+ "run mmcboot; fi; " \
+ "run nandboot; " \
  "fi; " \
  "else run nandboot; fi"
 
-#endif /* __OMAP3EVM_CONFIG_H */
+#endif /* __CONFIG_H */
--
2.13.4

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Re: [PATCH v2] omap3evm: Update board and defconfig files

Tom Rini-4
On Fri, Aug 04, 2017 at 06:58:34PM -0500, Derald D. Woods wrote:

> This patch brings the OMAP3 EVM to a bootable state, on master, as of
> v2017.09-rc1.
>
> Signed-off-by: Derald D. Woods <[hidden email]>
>
> ---
> Changes in v2:
> - Unset {EFI,ISO}_PARTITION
> - Unset EFI_LOADER
> - Unset SPL_EXT_SUPPORT
> - Unset THUMB_BUILD
> ** It does boot with THUMB_BUILD, it just should not be default
>
> ---
>  board/ti/evm/evm.c          | 126 +++++++++++---
>  board/ti/evm/evm.h          |  25 +--
>  configs/omap3_evm_defconfig |  70 +++++++-
>  include/configs/omap3_evm.h | 390 ++++++++++----------------------------------
>  4 files changed, 268 insertions(+), 343 deletions(-)
Please update board/ti/evm/MAINTAINERS as well, thanks!

--
Tom

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[PATCH v3] omap3: evm: Update board, defconfig, and maintainer file

Derald D. Woods
In reply to this post by Derald D. Woods
This patch brings the OMAP3 EVM to a bootable state, on master, as of
v2017.09-rc1.

Signed-off-by: Derald D. Woods <[hidden email]>

---

Changes in v3:
- Update MAINTAINERS file
- Update commit message

Changes in v2:
- Unset {EFI,ISO}_PARTITION
- Unset EFI_LOADER
- Unset SPL_EXT_SUPPORT
- Unset THUMB_BUILD
** It does boot with THUMB_BUILD, it just should not be default

---
 board/ti/evm/MAINTAINERS    |   2 +-
 board/ti/evm/evm.c          | 126 +++++++++++---
 board/ti/evm/evm.h          |  25 +--
 configs/omap3_evm_defconfig |  70 +++++++-
 include/configs/omap3_evm.h | 390 ++++++++++----------------------------------
 5 files changed, 269 insertions(+), 344 deletions(-)

diff --git a/board/ti/evm/MAINTAINERS b/board/ti/evm/MAINTAINERS
index 612a08ace0..cd315c1635 100644
--- a/board/ti/evm/MAINTAINERS
+++ b/board/ti/evm/MAINTAINERS
@@ -1,5 +1,5 @@
 EVM BOARD
-M: Tom Rini <[hidden email]>
+M: Derald D. Woods <[hidden email]>
 S: Maintained
 F: board/ti/evm/
 F: include/configs/omap3_evm.h
diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index fe8e79312f..e770ac04d0 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -12,6 +12,8 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 #include <common.h>
+#include <dm.h>
+#include <ns16550.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
@@ -22,14 +24,35 @@
 #include <i2c.h>
 #include <twl4030.h>
 #include <asm/mach-types.h>
+#include <asm/omap_musb.h>
 #include <linux/mtd/nand.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/musb.h>
 #include "evm.h"
 
-#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
-#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
+#ifdef CONFIG_USB_EHCI_HCD
+#include <usb.h>
+#include <asm/ehci-omap.h>
+#endif
+
+#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
+#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static const struct ns16550_platdata omap3_evm_serial = {
+ .base = OMAP34XX_UART1,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK,
+ .fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(omap3_evm_uart) = {
+ "ns16550_serial",
+ &omap3_evm_serial
+};
+
 static u32 omap3_evm_version;
 
 u32 get_omap3_evm_rev(void)
@@ -60,25 +83,19 @@ static void omap3_evm_get_revision(void)
  default:
  omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
        }
-#else
+#else /* !CONFIG_CMD_NET */
 #if defined(CONFIG_STATIC_BOARD_REV)
- /*
- * Look for static defintion of the board revision
- */
+ /* Look for static defintion of the board revision */
  omap3_evm_version = CONFIG_STATIC_BOARD_REV;
 #else
- /*
- * Fallback to the default above.
- */
+ /* Fallback to the default above */
  omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
-#endif
-#endif /* CONFIG_CMD_NET */
+#endif /* CONFIG_STATIC_BOARD_REV */
+#endif /* CONFIG_CMD_NET */
 }
 
-#ifdef CONFIG_USB_OMAP3
-/*
- * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
- */
+#if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
+/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
 u8 omap3_evm_need_extvbus(void)
 {
  u8 retval = 0;
@@ -88,7 +105,7 @@ u8 omap3_evm_need_extvbus(void)
 
  return retval;
 }
-#endif
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
 
 /*
  * Routine: board_init
@@ -105,7 +122,7 @@ int board_init(void)
  return 0;
 }
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD)
 /*
  * Routine: get_board_mem_timings
  * Description: If we use SPL then there is no x-loader nor config header
@@ -138,7 +155,34 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
  timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
  timings->mr = MICRON_V_MR_165;
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
+
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+static struct musb_hdrc_config musb_config = {
+ .multipoint     = 1,
+ .dyn_fifo       = 1,
+ .num_eps        = 16,
+ .ram_bits       = 12,
+};
+
+static struct omap_musb_board_data musb_board_data = {
+ .interface_type = MUSB_INTERFACE_ULPI,
+};
+
+static struct musb_hdrc_platform_data musb_plat = {
+#if defined(CONFIG_USB_MUSB_HOST)
+ .mode           = MUSB_HOST,
+#elif defined(CONFIG_USB_MUSB_GADGET)
+ .mode = MUSB_PERIPHERAL,
+#else
+#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
+#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
+ .config         = &musb_config,
+ .power          = 100,
+ .platform_ops = &omap2430_ops,
+ .board_data = &musb_board_data,
+};
+#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
 
 /*
  * Routine: misc_init_r
@@ -146,8 +190,9 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
  */
 int misc_init_r(void)
 {
+ twl4030_power_init();
 
-#ifdef CONFIG_SYS_I2C_OMAP34XX
+#if defined(CONFIG_SYS_I2C_OMAP34XX)
  i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
 #endif
 
@@ -161,6 +206,13 @@ int misc_init_r(void)
 #endif
  omap_die_id_display();
 
+#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
+ musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
+#endif
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
+ omap_die_id_usbethaddr();
+#endif
  return 0;
 }
 
@@ -175,7 +227,7 @@ void set_muxconf_regs(void)
  MUX_EVM();
 }
 
-#ifdef CONFIG_CMD_NET
+#if defined(CONFIG_CMD_NET)
 /*
  * Routine: setup_net_chip
  * Description: Setting up the configuration GPMC registers specific to the
@@ -237,7 +289,7 @@ static void reset_net_chip(void)
 int board_eth_init(bd_t *bis)
 {
  int rc = 0;
-#ifdef CONFIG_SMC911X
+#if defined(CONFIG_SMC911X)
 #define STR_ENV_ETHADDR "ethaddr"
 
  struct eth_device *dev;
@@ -254,7 +306,7 @@ int board_eth_init(bd_t *bis)
  rc = -1;
  }
  }
-#endif
+#endif /* CONFIG_SMC911X */
  return rc;
 }
 #endif /* CONFIG_CMD_NET */
@@ -264,11 +316,35 @@ int board_mmc_init(bd_t *bis)
 {
  return omap_mmc_init(0, 0, 0, -1, -1);
 }
-#endif
 
-#if defined(CONFIG_MMC)
 void board_mmc_power_init(void)
 {
  twl4030_power_mmc_init(0);
 }
-#endif
+#endif /* CONFIG_MMC */
+
+#if defined(CONFIG_USB_EHCI_HCD)
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(int index)
+{
+ return omap_ehci_hcd_stop();
+}
+#endif /* CONFIG_USB_EHCI_HCD */
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
+int board_eth_init(bd_t *bis)
+{
+ return usb_eth_initialize(bis);
+}
+#endif /* CONFIG_USB_ETHER */
diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h
index 91e9b88c54..0f8268b33e 100644
--- a/board/ti/evm/evm.h
+++ b/board/ti/evm/evm.h
@@ -278,12 +278,19 @@ static void reset_net_chip(void);
  /* TS_PEN_IRQ */\
  MUX_VAL(CP(MCSPI1_CS2), (IEN  | PTU | DIS | M4)) /*GPIO_176*/\
  /* - LAN_INTR*/\
- MUX_VAL(CP(MCSPI1_CS3), (IEN  | PTD | EN  | M0)) /*McSPI1_CS3*/\
- MUX_VAL(CP(MCSPI2_CLK), (IEN  | PTD | DIS | M0)) /*McSPI2_CLK*/\
- MUX_VAL(CP(MCSPI2_SIMO), (IEN  | PTD | DIS | M0)) /*McSPI2_SIMO*/\
- MUX_VAL(CP(MCSPI2_SOMI), (IEN  | PTD | DIS | M0)) /*McSPI2_SOMI*/\
- MUX_VAL(CP(MCSPI2_CS0), (IEN  | PTD | EN  | M0)) /*McSPI2_CS0*/\
- MUX_VAL(CP(MCSPI2_CS1), (IEN  | PTD | EN  | M0)) /*McSPI2_CS1*/\
+ /* USB EHCI (port 2) */\
+ MUX_VAL(CP(MCSPI1_CS3), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA2*/\
+ MUX_VAL(CP(MCSPI2_CLK), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA7*/\
+ MUX_VAL(CP(MCSPI2_SIMO), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA4*/\
+ MUX_VAL(CP(MCSPI2_SOMI), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA5*/\
+ MUX_VAL(CP(MCSPI2_CS0), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA6*/\
+ MUX_VAL(CP(MCSPI2_CS1), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA3*/\
+ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
+ MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
+ MUX_VAL(CP(ETK_D12_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DIR*/\
+ MUX_VAL(CP(ETK_D13_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_NXT*/\
+ MUX_VAL(CP(ETK_D14_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA0*/\
+ MUX_VAL(CP(ETK_D15_ES2), (IEN  | PTD | EN  | M3)) /*HSUSB2_DATA1*/\
  /*Control and debug */\
  MUX_VAL(CP(SYS_32K), (IEN  | PTD | DIS | M0)) /*SYS_32K*/\
  MUX_VAL(CP(SYS_CLKREQ), (IEN  | PTD | DIS | M0)) /*SYS_CLKREQ*/\
@@ -318,12 +325,6 @@ static void reset_net_chip(void);
  MUX_VAL(CP(ETK_D7_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D7*/\
  MUX_VAL(CP(ETK_D8_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D8*/\
  MUX_VAL(CP(ETK_D9_ES2 ), (IEN  | PTD | DIS | M0)) /*ETK_D9*/\
- MUX_VAL(CP(ETK_D10_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D10*/\
- MUX_VAL(CP(ETK_D11_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D11*/\
- MUX_VAL(CP(ETK_D12_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D12*/\
- MUX_VAL(CP(ETK_D13_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D13*/\
- MUX_VAL(CP(ETK_D14_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D14*/\
- MUX_VAL(CP(ETK_D15_ES2), (IEN  | PTD | DIS | M0)) /*ETK_D15*/\
  /*Die to Die */\
  MUX_VAL(CP(D2D_MCAD1), (IEN  | PTD | EN  | M0)) /*d2d_mcad1*/\
  MUX_VAL(CP(D2D_MCAD2), (IEN  | PTD | EN  | M0)) /*d2d_mcad2*/\
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index d29e43701c..d2f86260bb 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -1,32 +1,90 @@
 CONFIG_ARM=y
 # CONFIG_SYS_THUMB_BUILD is not set
+# CONFIG_SPL_SYS_THUMB_BUILD is not set
 CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_OMAP34XX=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MPUCLK=720
 CONFIG_TARGET_OMAP3_EVM=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_ENV_IS_IN_NAND=y
+# CONFIG_ENV_IS_IN_FAT is not set
 CONFIG_BOOTDELAY=3
+CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
 # CONFIG_SPL_EXT_SUPPORT is not set
+CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="OMAP3_EVM # "
+CONFIG_VERSION_VARIABLE=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_BOOTEFI is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_EEPROM is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
-CONFIG_CMD_JFFS2=y
-CONFIG_EFI_PARTITION=y
-# CONFIG_PARTITION_UUIDS is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(spl),1792k(u-boot),128k(dtb),128k(u-boot-env),6m(kernel),-(rootfs)"
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBIFS=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_PARTITION_UUIDS=y
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_DM_GPIO=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
+CONFIG_BAUDRATE=115200
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+CONFIG_SERIAL_PRESENT=y
+CONFIG_SPL_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_IRQ_BUFFER is not set
+CONFIG_SPL_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
-CONFIG_USB_STORAGE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0x5678
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+CONFIG_RBTREE=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 70cd0ea27e..ead2b1e556 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -14,349 +14,139 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 
-#ifndef __OMAP3EVM_CONFIG_H
-#define __OMAP3EVM_CONFIG_H
+#ifndef __CONFIG_H
+#define __CONFIG_H
 
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap.h>
+#define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
 
-/* ----------------------------------------------------------------------------
- * Supported U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_LONGHELP
-
-/* Allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Add auto-completion support */
-#define CONFIG_AUTO_COMPLETE
-
-/* ----------------------------------------------------------------------------
- * Supported hardware
- * ----------------------------------------------------------------------------
- */
-
-/* SPL */
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-/* Partition tables */
-
-/* USB
- *
- * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
- * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
- */
-#define CONFIG_USB_OMAP3
-#define CONFIG_USB_MUSB_HCD
-/* #define CONFIG_USB_MUSB_UDC */
-
-/* NAND SPL */
-#define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
- 10, 11, 12, 13}
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 3
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
-#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-
-/*
- * High level configuration options
- */
-
-#define CONFIG_SDRC /* The chip has SDRC controller */
-
-/*
- * Clock related definitions
- */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-
-/* Size of environment - 128KB */
-#define CONFIG_ENV_SIZE (128 << 10)
-
-/* Size of malloc pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
-
-/*
- * Physical Memory Map
- * Note 1: CS1 may or may not be populated
- * Note 2: SDRAM size is expected to be at least 32MB
- */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
-
-/* Limits for memtest */
-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
- 0x01F00000) /* 31MB */
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
-
-/* -----------------------------------------------------------------------------
- * Hardware drivers
- * -----------------------------------------------------------------------------
- */
-
-/*
- * NS16550 Configuration
- */
-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
-#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
- 115200}
-
-/*
- * I2C
- */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_OMAP34XX
-
-/*
- * PISMO support
- */
-/* Monitor at start of flash - Reserve 2 sectors */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-
-/* Start location & size of environment */
-#define ONENAND_ENV_OFFSET 0x260000
-#define SMNAND_ENV_OFFSET 0x260000
-
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+#include <configs/ti_omap3_common.h>
 
 /*
- * NAND
+ * We are only ever GP parts and will utilize all of the "downloaded image"
+ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
  */
-/* Physical address to access NAND */
-#define CONFIG_SYS_NAND_ADDR NAND_BASE
-
-/* Physical address to access NAND at CS0 */
-#define CONFIG_SYS_NAND_BASE NAND_BASE
-
-/* Max number of NAND devices */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-/* Timeout values (in ticks) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
- CONFIG_SYS_MAX_NAND_DEVICE)
-
-#define CONFIG_SYS_JFFS2_MEM_NAND
-#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS 1
-
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV "nand0"
-/* Start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET 0x680000
-/* Size of jffs2 partition */
-#define CONFIG_JFFS2_PART_SIZE 0xf980000
-
-/*
- * USB
- */
-#ifdef CONFIG_USB_OMAP3
-
-#ifdef CONFIG_USB_MUSB_HCD
-
-#ifdef CONFIG_USB_KEYBOARD
-#define CONFIG_SYS_USB_EVENT_POLL
-#define CONFIG_PREBOOT "usb start"
-#endif /* CONFIG_USB_KEYBOARD */
-
-#endif /* CONFIG_USB_MUSB_HCD */
+#undef CONFIG_SPL_TEXT_BASE
+#define CONFIG_SPL_TEXT_BASE            0x40200000
 
-#ifdef CONFIG_USB_MUSB_UDC
-/* USB device configuration */
-#define CONFIG_USB_DEVICE
-#define CONFIG_USB_TTY
-
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID 0x0451
-#define CONFIG_USBD_PRODUCTID 0x5678
-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME "EVM"
-#endif /* CONFIG_USB_MUSB_UDC */
-
-#endif /* CONFIG_USB_OMAP3 */
-
-/* ----------------------------------------------------------------------------
- * U-Boot features
- * ----------------------------------------------------------------------------
- */
-#define CONFIG_SYS_MAXARGS 16 /* max args for a command */
+#define CONFIG_SPL_FRAMEWORK
 
 #define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 
-/* Size of Console IO buffer */
-#define CONFIG_SYS_CBSIZE 512
-
-/* Size of print buffer */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* Size of bootarg buffer */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-
-#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_SYS_I2C_OMAP34XX
 
-/*
- * NAND / OneNAND
- */
-#if defined(CONFIG_CMD_NAND)
+/* Override OMAP3 serial console configuration */
+#undef CONFIG_CONS_INDEX
+#define CONFIG_CONS_INDEX               1
+#define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
+#if defined(CONFIG_SPL_BUILD)
+#undef CONFIG_SYS_NS16550_REG_SIZE
+#else /* !CONFIG_SPL_BUILD  */
+#define CONFIG_SYS_NS16550_REG_SIZE     (-1)
+#endif /* CONFIG_SPL_BUILD */
+
+/* NAND */
+#if defined(CONFIG_NAND)
+#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_FLASH_BASE NAND_BASE
+#define CONFIG_SYS_MAX_NAND_DEVICE      1
+#define CONFIG_BCH
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT      64
+#define CONFIG_SYS_NAND_PAGE_SIZE       2048
+#define CONFIG_SYS_NAND_OOBSIZE         64
+#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
+                                         10, 11, 12, 13}
+#define CONFIG_SYS_NAND_ECCSIZE         512
+#define CONFIG_SYS_NAND_ECCBYTES        3
+#define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
+#define CONFIG_ENV_IS_IN_NAND           1
+#define CONFIG_ENV_SIZE                 (128 << 10) /* 128 KiB */
+#define SMNAND_ENV_OFFSET               0x260000    /* environment starts here */
+#define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
+#define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
+#define CONFIG_MTD_PARTITIONS           /* required for UBI partition support */
+#endif /* CONFIG_NAND */
 
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
-#endif
+#define CONFIG_USB_OMAP3
 
-#if !defined(CONFIG_ENV_IS_NOWHERE)
-#if defined(CONFIG_CMD_NAND)
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
-#endif
-#endif /* CONFIG_ENV_IS_NOWHERE */
+/* MUSB */
+#define CONFIG_USB_MUSB_OMAP2PLUS
+#define CONFIG_USB_MUSB_PIO_ONLY
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETHER_RNDIS
 
-#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
+/* USB EHCI */
+#define CONFIG_SYS_USB_FAT_BOOT_PARTITION  1
 
+/* SMSC911x Ethernet */
 #if defined(CONFIG_CMD_NET)
-
-/* Ethernet (SMSC9115 from SMSC9118 family) */
 #define CONFIG_SMC911X
 #define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE 0x2C000000
-
-/* BOOTP fields */
-#define CONFIG_BOOTP_SUBNETMASK 0x00000001
-#define CONFIG_BOOTP_GATEWAY 0x00000002
-#define CONFIG_BOOTP_HOSTNAME 0x00000004
-#define CONFIG_BOOTP_BOOTPATH 0x00000010
-
+#define CONFIG_SMC911X_BASE             0x2C000000
 #endif /* CONFIG_CMD_NET */
 
-/* Support for relocation */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-
-/* -----------------------------------------------------------------------------
- * Board specific
- * -----------------------------------------------------------------------------
- */
-
-/* Uncomment to define the board revision statically */
-/* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
-
-/* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_TEXT_BASE 0x40200800
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
- CONFIG_SPL_TEXT_BASE)
-
-#define CONFIG_SPL_BSS_START_ADDR 0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
-
-#define CONFIG_SPL_OMAP3_ID_NAND
-#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80100000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-
-/* -----------------------------------------------------------------------------
- * Default environment
- * -----------------------------------------------------------------------------
- */
+/* Environment */
+#define CONFIG_PREBOOT                  "usb start"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
+ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
+ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  "loadaddr=0x82000000\0" \
  "usbtty=cdc_acm\0" \
  "mmcdev=0\0" \
  "console=ttyO0,115200n8\0" \
  "mmcargs=setenv bootargs console=${console} " \
+ "${optargs} " \
  "root=/dev/mmcblk0p2 rw " \
- "rootfstype=ext3 rootwait\0" \
+ "rootfstype=ext4 rootwait\0" \
  "nandargs=setenv bootargs console=${console} " \
- "root=/dev/mtdblock4 rw " \
- "rootfstype=jffs2\0" \
+ "${optargs} " \
+ "root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd " \
+ "rootfstype=ubifs rootwait\0" \
  "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  "bootscript=echo Running bootscript from mmc ...; " \
  "source ${loadaddr}\0" \
- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc ...; " \
+ "loaduimage=setenv bootfile uImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+ "loadzimage=setenv bootfile zImage; " \
+ "fatload mmc ${mmcdev} ${loadaddr} zImage\0" \
+ "loaddtb=fatload mmc ${mmcdev} ${fdtaddr} omap3-evm.dtb\0" \
+ "mmcboot=echo Booting ${bootfile} from mmc ...; " \
+ "run mmcargs; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0" \
+ "mmcbootz=echo Booting ${bootfile} from mmc ...; " \
  "run mmcargs; " \
- "bootm ${loadaddr}\0" \
- "nandboot=echo Booting from nand ...; " \
+ "bootz ${loadaddr} - ${fdtaddr}\0" \
+ "nandboot=echo Booting uImage from nand ...; " \
  "run nandargs; " \
- "onenand read ${loadaddr} 280000 400000; " \
- "bootm ${loadaddr}\0" \
+ "nand read ${loadaddr} kernel; " \
+ "nand read ${fdtaddr} dtb; " \
+ "bootm ${loadaddr} - ${fdtaddr}\0"
 
 #define CONFIG_BOOTCOMMAND \
  "mmc dev ${mmcdev}; if mmc rescan; then " \
  "if run loadbootscript; then " \
  "run bootscript; " \
  "else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run nandboot; " \
- "fi; " \
+ "if run loadzimage && run loaddtb; then " \
+ "run mmcbootz; fi; " \
+ "if run loaduimage && run loaddtb; then " \
+ "run mmcboot; fi; " \
+ "run nandboot; " \
  "fi; " \
  "else run nandboot; fi"
 
-#endif /* __OMAP3EVM_CONFIG_H */
+#endif /* __CONFIG_H */
--
2.13.0

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Re: [PATCH v3] omap3: evm: Update board, defconfig, and maintainer file

Tom Rini-4
On Sun, Aug 06, 2017 at 12:00:21AM -0500, Derald D. Woods wrote:

> This patch brings the OMAP3 EVM to a bootable state, on master, as of
> v2017.09-rc1.
>
> Signed-off-by: Derald D. Woods <[hidden email]>
>

Reviewed-by: Tom Rini <[hidden email]>

--
Tom

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Re: [U-Boot, v3] omap3: evm: Update board, defconfig, and maintainer file

Tom Rini-4
In reply to this post by Derald D. Woods
On Sun, Aug 06, 2017 at 12:00:21AM -0500, Derald D. Woods wrote:

> This patch brings the OMAP3 EVM to a bootable state, on master, as of
> v2017.09-rc1.
>
> Signed-off-by: Derald D. Woods <[hidden email]>
> Reviewed-by: Tom Rini <[hidden email]>

Applied to u-boot/master, thanks!

--
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