[PATCH] arm64: zynqmp: Add device tree node for 2nd mux on I2C1 bus

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[PATCH] arm64: zynqmp: Add device tree node for 2nd mux on I2C1 bus

Michal Simek-3
From: Saeed Nowshadi <[hidden email]>

There is 2nd pca9548 mux on I2C1 bus that controls SFP0, SFP1, and QSFP1
ports. Channel 0 and 1 are connected to J287 connector for SFP0 & SFP1, and
channel 2 is connected to J288 connector for QSFP1.

Signed-off-by: Saeed Nowshadi <[hidden email]>
Signed-off-by: Michal Simek <[hidden email]>
---

 arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index a8bbb14f6cd1..b81919e31948 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -554,6 +554,31 @@
  reg = <7>;
  };
  };
+ i2c-mux@75 { /* u214 */
+ compatible = "nxp,pca9548";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x75>;
+ i2c@0 { /* SFP0_IIC */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ /* SFP0 */
+ };
+ i2c@1 { /* SFP1_IIC */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ /* SFP1 */
+ };
+ i2c@2 { /* QSFP1_I2C */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ /* QSFP1 */
+ };
+ /* 3 - 7 unused */
+ };
 };
 
 &xilinx_ams {
--
2.28.0

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Re: [PATCH] arm64: zynqmp: Add device tree node for 2nd mux on I2C1 bus

Michal Simek-4
čt 27. 8. 2020 v 14:43 odesílatel Michal Simek <[hidden email]> napsal:

>
> From: Saeed Nowshadi <[hidden email]>
>
> There is 2nd pca9548 mux on I2C1 bus that controls SFP0, SFP1, and QSFP1
> ports. Channel 0 and 1 are connected to J287 connector for SFP0 & SFP1, and
> channel 2 is connected to J288 connector for QSFP1.
>
> Signed-off-by: Saeed Nowshadi <[hidden email]>
> Signed-off-by: Michal Simek <[hidden email]>
> ---
>
>  arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 25 +++++++++++++++++++++++++
>  1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
> index a8bbb14f6cd1..b81919e31948 100644
> --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
> +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
> @@ -554,6 +554,31 @@
>                         reg = <7>;
>                 };
>         };
> +       i2c-mux@75 { /* u214 */
> +               compatible = "nxp,pca9548";
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               reg = <0x75>;
> +               i2c@0 { /* SFP0_IIC */
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <0>;
> +                       /* SFP0 */
> +               };
> +               i2c@1 { /* SFP1_IIC */
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <1>;
> +                       /* SFP1 */
> +               };
> +               i2c@2 { /* QSFP1_I2C */
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <2>;
> +                       /* QSFP1 */
> +               };
> +               /* 3 - 7 unused */
> +       };
>  };
>
>  &xilinx_ams {
> --
> 2.28.0
>

Applied.
M

--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs