[PATCH 1/2] clk: at91: clk-master: add 5th divisor for mck master

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[PATCH 1/2] clk: at91: clk-master: add 5th divisor for mck master

Eugen Hristev
clk-master can have 5 divisors with a field width of 3 bits
on some products.

Change the mask and number of divisors accordingly.

Reported-by: Mihai Sain <[hidden email]>
Signed-off-by: Eugen Hristev <[hidden email]>
Reviewed-by: Claudiu Beznea <[hidden email]>
---
 drivers/clk/at91/clk-master.c | 2 +-
 drivers/clk/at91/pmc.h        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index 759df93697..5d93e6a7e5 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -24,7 +24,7 @@
 #define MASTER_PRES_MASK 0x7
 #define MASTER_PRES_MAX MASTER_PRES_MASK
 #define MASTER_DIV_SHIFT 8
-#define MASTER_DIV_MASK 0x3
+#define MASTER_DIV_MASK 0x7
 
 #define PMC_MCR 0x30
 #define PMC_MCR_ID_MSK GENMASK(3, 0)
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index a6a714fd22..f07f535e49 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -30,7 +30,7 @@ extern const struct clk_master_layout at91sam9x5_master_layout;
 
 struct clk_master_characteristics {
  struct clk_range output;
- u32 divisors[4];
+ u32 divisors[5];
  u8 have_div3_pres;
 };
 
--
2.25.1

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[PATCH 2/2] clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics

Eugen Hristev
This SoC has the 5th divisor for the mck0 master clock.
Adapt the characteristics accordingly.

Reported-by: Mihai Sain <[hidden email]>
Signed-off-by: Eugen Hristev <[hidden email]>
Reviewed-by: Claudiu Beznea <[hidden email]>
---
 drivers/clk/at91/sama7g5.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index b96937673b..c0d9271966 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -189,13 +189,13 @@ static const struct clk_pll_layout pll_layout_divio = {
 /* MCK0 characteristics. */
 static const struct clk_master_characteristics mck0_characteristics = {
  .output = { .min = 140000000, .max = 200000000 },
- .divisors = { 1, 2, 4, 3 },
+ .divisors = { 1, 2, 4, 3, 5 },
  .have_div3_pres = 1,
 };
 
 /* MCK0 layout. */
 static const struct clk_master_layout mck0_layout = {
- .mask = 0x373,
+ .mask = 0x773,
  .pres_shift = 4,
  .offset = 0x28,
 };
--
2.25.1

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Re: [PATCH 1/2] clk: at91: clk-master: add 5th divisor for mck master

Eugen Hristev
In reply to this post by Eugen Hristev
On 08.10.2020 14:46, Eugen Hristev wrote:
> clk-master can have 5 divisors with a field width of 3 bits
> on some products.
>
> Change the mask and number of divisors accordingly.
>
> Reported-by: Mihai Sain <[hidden email]>
> Signed-off-by: Eugen Hristev <[hidden email]>
> Reviewed-by: Claudiu Beznea <[hidden email]>
> ---

Applied both to u-boot-atmel/master